1. Field of the Invention
This invention generally relates to methods and systems for determining a position of inspection data with respect to a stored high resolution die image.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Semiconductor manufacturing involves a large and complex set of imaging, etching, deposition and planarization processes in order to construct sub-micron (down to a few tens of nanometers) geometrical patterns on a silicon substrate. After a process has been performed to at least partially construct the patterns on the silicon substrate, the substrate must be inspected to determine if there are defects in the patterns or on the substrate. There are a number of different methods and systems that are used to inspect such substrates for defects. The type of method or system that is used for any particular substrate that has undergone any particular fabrication process may be selected based on characteristics of the substrate as well as the defects that are to be detected on the substrate.
Some inspection systems and methods make use of the design data for the substrates during inspection or to set up inspection. For example, the design layout of the die being formed on such substrates is often used to identify critical regions (such as areas of high geometry density) and other so-called “hot spots” where defects can manifest themselves. By separating critical from non-critical regions, a more sensitive inspection can be performed in the critical areas and a less sensitive inspection in the less critical areas. U.S. Pat. No. 7,676,077 issued on Mar. 9, 2010 to Kulkarni et al., which is incorporated by reference as if fully set forth herein, describes this approach.
The design layout may also be used to classify defects detected on wafers. For example, a design-based classification (DBC) approach may use a post-processing approach to bin/classify defects found by an inspection tool using design context around each detected defect. Thus, determining critical areas and classifying defects based on design data provide a “front-end” and “back-end” approach to detecting and filtering of defects in order to flag systematic as well as random yield-relevant defects. Therefore, the approaches described above require design data to be available. However, in many circumstances, the design information may not be readily available.
Another approach, commonly referred to as target-based inspection (TBI) seeks to utilize a priori locations or hot spots that are known to the user. TBI uses an optical template around these areas of interest to mark all such regions of a die, which are then inspected at a higher sensitivity. Therefore, TBI is restricted to only those a priori locations where it is known that defects are likely to occur. In many instances, this data is either incomplete or unknown.
Accordingly, it would be advantageous to develop methods and/or systems for wafer inspection-related applications that do not have one or more of the disadvantages described above.